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 ESDA14V2-4BF3
Quad bidirectional TransilTM array for ESD protection
Features

4 Bidirectional Transil functions ESD Protection: IEC61000-4-2 level 4 Stand off voltage: 12 V Min. Low leakage current < 0.5 A 50 W Peak pulse power (8/20 s)
Flip Chip (5 bumps)
Benefits

High ESD protection level High integrationSuitable for high density boards Suitable for high density boards Figure 1. Pin layout (bump side)
3 2 1 A B C
Complies with the following standards:
IEC 61000-4-2 - 15 kV (air discharge) - 8 kV (contact discharge)
MIL STD 883E- Method 3015-7: class3
- 25 kV (human body model)
Figure 2.
Configuration
A1 A3 C1 C3
Applications
Where transient overvoltage protection in ESD sensitive equipment is required, such as :

Computers
B2
Printers Communication systems and cellular phones Video equipment
GND
Description
The ESDA14V2-4BF3 is a monolithic array designed to protect up to 4 lines in a bidirectional way against ESD transients.The device is ideal for situations where board space saving is requested. This device is particularly adapted to the protection of symmetrical signals.
TM: Transil is ASD a trademark of STMicroelectronics.
April 2008
Rev 3
1/8
www.st.com
Characteristics
ESDA14V2-4BF3
1
Characteristics
Table 1.
Symbol
Absolute ratings (limiting values)
Parameter MIL STD 883E - Method 3015-7 IEC61000-4-2 air discharge IEC61000-4-2 contact discharge Value 25 15 8 50 125 -55 to +150 260 -40 to +125 Unit
VPP PPP Tj Tstg TL Top
ESD discharge
kV W C C C C
Peak pulse power (8/20s) Junction temperature Storage temperature range Lead solder temperature (10 seconds duration) Operating temperature range
Table 2.
Symbol VBR IRM VRM VCL Rd IPP C
Electrical characteristics (Tamb = 25 C)
Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Capacitance VBR @ IR IRM @ VRM max V 18 mA 1 max. A 0.5 0.1 V 12 3 Rd
Slope: 1 / Rd IPP VCL VBR VRM V I
T
C max. 0 V bias pF 15
Order code
min. V
typ.(1) max.(2) 3.2 10-4/C 10
ESDA14V2-4BF3
14.2
1. Square pulse, Ipp = 3 A, tp = 2.5 s. 2.
VBR = T* (Tamb -25 C) * VBR (25 C)
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ESDA14V2-4BF3
Characteristics
Figure 3.
Clamping voltage versus peak Figure 4. pulse current (Tj initial = 25 C) (Rectangular waveform, tp = 2.5 s)
C(pF)
16
Junction capacitance versus reverse applied voltage (typical values)
IPP(A)
10.0
tp =2.5 s Tj initial =25 C
14 12 10
F=1 MHz VOSC=30 mV RMS Tj =25 C
1.0
8 6 4
VCL(V)
2 0
VR(V) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
0.1 0 10 20 30 40 50 60
Figure 5.
Relative variation of leakage current versus junction temperature (typical values)
Figure 6.
ESD response to IEC 61000-4-2 (+15 kV air discharge)
IR [Tj ] / IR [Tj =25 C]
100
10
T j(C) 1 25 50 75 100 125
Figure 7.
ESD response to IEC 61000-4-2 (-15 kV air discharge)
Figure 8.
0.00
Analog crosstalk measurements
-30.00
-60.00
-90.00
f/Hz -120.00 100.0k 1.0M Xtalk 10.0M 100.0M 1.0G
3/8
Application information
ESDA14V2-4BF3
Figure 9.
Digital crosstalk measurements
2
Application information
Figure 10. Aplac model
A1 A3 C1 C3
Ls
Ls
Ls
Ls
Rs
Rs
aplacvar Ls 290pH aplacvar Lgnd 130pH aplacvar Rs 100m Model D01 BV=16 IBV=1m CJO=12p M=0.333 RS=2.9 VJ=0.6 TT=100n Model D02 BV=16 IBV=1m CJO=320p M=0.333 RS=80m VJ=0.6 TT=100n
Rs
Rs
MODEL = D01
MODEL = D01
MODEL = D01
MODEL = D01
MODEL = D02
Rs
Lgnd
B2
4/8
ESDA14V2-4BF3
Ordering information scheme
3
Ordering information scheme
Figure 11. Ordering information scheme
ESDA
ESD Array Breakdown Voltage 14V2 = 14.2 Volts min. Number of line 4 = 4 lines Type B = Bidirectional Package F = Flip Chip x = 3: lead-free, pitch = 400m, bump height = 255 m
14V2 - 4
B
Fx
4
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 12. Package dimensions
565 m 40 185 m 10 255 m 40 605 m 55
185 m 0.935 mm 30m
185 m
0.935 mm 30m
40 0
m
40
5/8
Ordering information
ESDA14V2-4BF3
Figure 13. Footprint
Copper pad Diameter: 220 m recommended 260 m maximum Solder mask opening: 300 m minimum
Figure 14. Marking
Dot xx = marking z = manufacturing location yww = datecode (y = year ww = week)
Solder stencil opening: 220 m recommended
xxz y ww
Figure 15. Flip Chip tape and reel specifications
Dot identifying Pin A1 location 4 0.1 O 1.5 0.1
1.75 0.1 3.5 0.1
1.04
0.69 0.05
All dimensions in mm
8 0.3
xxz yww
User direction of unreeling
xxz yww
xxz yww
4 0.1
1.04
Note:
More information is available in the application notes: AN2348:"400 m Flip Chip: Package description and recommendations for use" AN1751: EMI Filters: Recommendations and measurements
5
Ordering information
Table 3. Ordering information
Marking EF Package Flip Chip Weight 1.10 mg Base qty 5000 Delivery mode Tape and reel 7"
Order code ESDA14V2-4BF3
6/8
ESDA14V2-4BF3
Revision history
6
Revision history
Table 4.
Date 19-Sep-2005 15-Dec-2005
Document revision history
Revision 1 2 Initial release. Dimension from center bump to corner bump changed in Figure 9 to indicate diagonal instead of perpendicular measurement. No values changed. ECOPACK statement added. Updated ordering information. Updated ECOPACK statement. Updated Figure 11, Figure 12 and Figure 15. Reformatted to current standards. Changes
18-Apr-2008
3
7/8
ESDA14V2-4BF3
Please Read Carefully:
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